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A uC communicates with my CPLDs using SPI. What I'm not sure about is how to best cascade these CPLDs in order to obtain a larger shift register.
... I'd like to place these additional CPLDs on a different PCB. This has the advantage that I can simply extend the device when I need ...
I think buffering the signals would be good practice. But what would be the best way to actually connect the PCBs together?
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There are two solutions;
1. Using JTAG to control all the boards.
You want a single JTAG cable to control multiple boards, so you need a standard JTAG header on each board (the JTAG input connector), and then a buffer that drives TCK/TMS to the next board - that'll be a second JTAG header. The TDO bit on the CPLD will drive the TDI bit on the second JTAG header, and then you will want a jumper that selects the source for the TDO bit that drives the first JTAG header, either TDO from the second header if the board is in the middle of the daisy chain, or the TDO from the CPLD on that board, if it is the last in the chain.
2. SPI daisy chain.
What if your environment is really noisy, and the JTAG scheme does not work? Be conservative.
Connect SEL/SCK/MOSI signals to RS485/422 drivers and MISO to a receiver, and route the signals along with GND to a header. Again, you'll need two of these interfaces; one as an SPI master, and one as an SPI slave. The first board in the daisy chain could be controlled from JTAG, and the remainder can daisy chain via SPI.
Since the RS485/422 drivers are operated in a fixed direction, you do not need to worry about bus turnaround, so you can leave them enabled.
You could also use LVDS drivers/receivers for this application.
This will be a robust solution for noisy environments.
Cheers,
Dave
Honored Contributor
