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CLi19's avatar
CLi19
Icon for New Contributor rankNew Contributor
7 years ago

"Can't recognize silicon ID for device 1" while programming FLASH

Hello, I've been working on this problem for 3 days but still can't find a solution. The background: FPGA cyclone IV EP4CGX75DF27 FLASH EPCS64 Quartus prime 16.0 use the epcs flash controller ...
Nooraini_Y_Intel's avatar
Nooraini_Y_Intel
Icon for Frequent Contributor rankFrequent Contributor
7 years ago

Hi CLi19,

I assume that you are aware that currently we don't support Cypress Spansion for FPGA AS configuration scheme. JFYI, our Quartus programmer is validated and guarantee to correctly program only EPCQ-A and MT25Q devices. The current direction for low density EPCS and EPCQ EOL is to switch EPCQA device. You can refer to the PDN1708 and AN822 for the details in the following link:

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/pcn/pdn1708.pdf

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/an/an822.pdf

For high density EPCQ/EPCQL(=>256Mb), the plan is moving to support 3rd party flash devices starting from Quartus v18.1. However we have identify MT25Q flash family devices from Micron can be use as replacement for EPCQ/EPCQL(=>256Mb). You can refer to the following link for details:

https://www.altera.com/support/support-resources/knowledge-base/component/2018/how-do-i-enable-micron-s-mt25q-support-for-eol-of-epcq---256mb--.html

Anyway, going back to this issue, have you try to perform full erase on the SPI flash device? Try to instantiate the SFL IP into the Cyclone IV design? You can refer to chapter 1.4.1 Instantiating the Intel FPGA Serial Flash Loader IP Core from the AN370 in the following link:

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/an/an370.pdf

Create a custom design with just the SFL IP instantiated in the Cyclone IV proejct design. Set the unused pin option to reserve as input tristate. Please refer to the attached screen shot. Then recompile the design to get a new sof file.

  1. Program the new .sof file into the Cyclone IV device.
  2. Once the .sof file is programmed, perform auto-detect.
  3. You should be able to see the EPCS/EPCQ device being detect attach to the FPGA if the SFL IP is correctly configured into the FPGA.
  4. If the EPCS/EPCQ device can be detect in the programmer, then check the Erase option and start to perform full erase.
  5. After perform full erase successfully, then try to program with the good .jic file.

Regards,

Nooraini