Forum Discussion
Altera_Forum
Honored Contributor
13 years agoCan't generate netlist output files
hi, am using TSE mac ip for my project, while compiling upto timequest timing analysis it was succesfull, SOF file is also created, but in EDA netlist writer am getting this below error. ...
Altera_Forum
Honored Contributor
13 years agoYes, I'm trying to simulate the complete design. My system is a university project, I don't know where the license come from... I found this detail in License Setup. I'm trying to use modelsim simulation for the project but create a netlist seems to be impossible...