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Altera_Forum
Honored Contributor
Honored ContributorCan I exchange the positive signal (p) and negative (n) signal of LVDS?
Can I exchange the positive signal (p) and negative (n) signal of LVDS in Cyclone devices? In order to avoid the use of vias.
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- Is the LVDS clock signal can also be inverted inside the FPGA? --- Quote End --- You have to apply a phase shift. In my opinion, inverting the signals is good to fix layout errors, but I won't use it as regular design means.
