Can DMA do NOT use a same clock with PCIe IP when using Cyclone IV GX?

Thanks akira.

And for the first question,

for PCIe transmit,the sender has to use a same clock with PCIe.

For the second quesion.

In DMA write mode,

ARM SOC order DMA IP to transmit to write data to its(ARM) RAM.

And then DMA start to operate,when transfer is done,

DMA can send a IRQ through PCIe.

ARM knows that it is done

.

BUT,in this case,How does the PCIe IP know the transfer is done?

The IRQ is just sent through PCIe IRQ channel.The PCIe doesn't know the meaning of IRQ.

And accroding to the PCIe protocal,there are data length in TLP,how does PCIe IP knows the payload length?