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Altera_Forum
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17 years ago

Can a PLL be implemented in a CPLD

Hi, I would like to use an external VCXO and I guess amplifier/filter to sync a 10MHz clk to a GPS 1 HZ signal. Can anyone suggest if this is possible and if so where would I start looking for...
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Altera_Forum
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17 years ago

Hi FvM,

Thanks for the reply,

My maths level is just short of Laplace and Fourier but I'm learning.

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It's mainly a matter of good system design, the type of utilized digital logic is of secondary importance to my opinion. And it's almost clear, that the PLL components present in most FPGA are of no use for this application.

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Can you recommend a reference for good PLL system design??