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Altera_Forum
Honored Contributor
17 years agoCan a PLL be implemented in a CPLD
Hi, I would like to use an external VCXO and I guess amplifier/filter to sync a 10MHz clk to a GPS 1 HZ signal. Can anyone suggest if this is possible and if so where would I start looking for...
Altera_Forum
Honored Contributor
17 years agoNot long ago I designed a phase comparator in stratix II for an external PLL. The phase comparator sends charge pump pulses(of different duty cycles) and it worked. This phase comparator is certainly implementable in CPLD
My clocks were not that far apart but you can get a counter to divide yours. If you are interested in this phase comparator I can post the design