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Altera_Forum
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18 years ago

Boundary-scan testing with Arria GX and Stratix III

Hi, I would like to implement boundary-scan testing on my new board. I don't understand how we must connect configuration pins (nCONFIG, nSTATUS, CONF_DONE, TRST, MSEL, nCE). Do these signals...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
18 years ago

Thanks.

It's clear now.

However, I read that JTAG standard for TCK is a pull-up. In all Altera schematics, I saw a pull-down.

Is this compatible?