Blockram: RAM model read/write

There seems to be some logic issues in the code if I understand what you are trying to do.

Assuming that A is a vector of 14 bits (13 downto 0)....

It appears you are using bit 13 of the address, A, to select the ram. If this is the case, you need to qualify the vram_wren_sig with bit 13 of A.

Something like: vram_wren_sig <= not Wr_n when A(13) = '1' else '0';

You can also take vram_data_sig and vram_q_sig_reg out of the clocked process.

And, you should not have to subtract x"2000" for vram_rdaddress_sig or vram_wraddress_sig. Just assign them to A(12 downto 0)

The key is to make sure you are only writing to ram when you should be, I assume it is when A(13) = '1'. And to make sure you are muxing DI_CPU correctly based on the address. For DI_CPU, I assume that when A(13) = '0' then you mux in the data from D_ROM and when A(13) = '1' then you mux in the data from the ram.