Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Binary to Binary coded deicmal help

Hi guys, I'm having trouble implementing a double dabble algorithm in verilog. These modules are supposed to produce 8bit BCD output from 5bit binary input. However, it seems like the binary ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Just noticed you are adding 3 to ones yet the code adds 3 to all in bits.

Shouldn't you say:

if in(8:5) > 4 out(8:5) = out(8:5)+3; as the tens