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Altera_Forum
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14 years ago

Binary to Binary coded deicmal help

Hi guys, I'm having trouble implementing a double dabble algorithm in verilog. These modules are supposed to produce 8bit BCD output from 5bit binary input. However, it seems like the binary ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

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There should be no principle problem to implement the algorithm completely asynchronously.

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Certainly clock is not needed "in principle" just for this piece of work and especially for a beginner using finger buttons to generate inputs. But for a safer design methodology within a project and working on faster inputs I will use the clock.

moreover, the statement:

out = out + 3 implies feedback and I believe it can't survive asynchronously