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Altera_Forum
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15 years ago

Bidirectional, tri-state buffer, VHDL problem

I m working with tg68k mc68k core emulation for FPGA. When i compile code i get 31 ADRESS BUSS pins, also 16 input, and 16 output pins. I need to join those 16 in and out pins to get 16 bidirectional...
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Altera_Forum
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14 years ago

I solved this problem, but now i have one more. How ti integrate sdram controller to tg68 core ? Do you have any ideas, is there any examples to do this.