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Altera_Forum
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15 years ago

Bidirectional, tri-state buffer, VHDL problem

I m working with tg68k mc68k core emulation for FPGA. When i compile code i get 31 ADRESS BUSS pins, also 16 input, and 16 output pins. I need to join those 16 in and out pins to get 16 bidirectional...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

I found where is the problem ( i think). All is working fine but other missing signals that i need (ADRESS BUSS etc...) are in TG68.vhd file. Also in that file i can see every signal that i used in my code. As i m thinking i need somehow to connect TG68.vhd to my code and reuse signals from that file.