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Altera_Forum
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18 years ago

Bidirectional IOs in FPGA

Hi, In my project, I have 2 bidirectional IO buses of 32-bit width. I need to connect both of them together for 2-way data transfer. I've tried two options in VHDL: bus1 <= bus2 This...
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Altera_Forum
Icon for Honored Contributor rankHonored Contributor
18 years ago

Hello,

additionally, I think that it's physically impossible to achieve the function without a direction signal. I overlooked this point at first sight. Please notice, that physically nothing but a BIDIR primitive can be instantiated at each pin. It has an OE input, that must be controlled somehow. How can the logic determine data direction without a control signal?

Regards,

Frank