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Altera_Forum
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18 years ago

Bidirectional Differential IO

Hi, Is it possible to have bidirectional differential IO's in Altera FPGA. (Any series). Plz reply. Regards, Jaseel
Altera_Forum's avatar
Altera_Forum
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18 years ago

As far as I understand, only differential SSTL is supported for memory. Particularly no output enable is provided for any LVDS standard, so anything similar to M-LVDS isn't supported. For lower bit rates, a pseudo differential driver using two outputs and separate LVDS receiver could probably be used.