Avalon discussion

Actually the two terms are often assumed to be equivalent in this forum.

I believe in a ideal bus structure all devices are supposed to be connected in parallel and two masters can't use the bus in the same time.

Avalon has instead a matrix structure with different paths connecting the devices and this avoids bus contention in most cases, making arbitration easier at the price of higher complexity.

Moreover Avalon features both a Memory Mapped and a Streaming interface.

Thank you!

I get another idea, bus is an inter-architecture, which is for interconnection.However avalon support exporting the interface to off-chip peripherals. Strictly speaking avalon is "interface"!