Forum Discussion
Altera_Forum
Honored Contributor
13 years agoArria V LVDS IO
Hello, Knowledge base (http://www.altera.com/support/kdb/solutions/fb128391.html) states: "You must assign the LVDS I/O standard-enabled pins in the right I/O bank as PLL clock input pins only"...
Altera_Forum
Honored Contributor
13 years agoI can't find it either. I was told that it would available today. Maybe wait till EoB. But I can feel your pain. As these devices are getting complex, even the 1000 page documentation is not enough to bring out the subtleties that can make or break a design.
-sanjay