Forum Discussion
Altera_Forum
Honored Contributor
13 years agoArria V LVDS IO
Hello, Knowledge base (http://www.altera.com/support/kdb/solutions/fb128391.html) states: "You must assign the LVDS I/O standard-enabled pins in the right I/O bank as PLL clock input pins only"...
Altera_Forum
Honored Contributor
13 years agoTry Quartus 12.1 sp1. In my design I use these pins to bring in lvds clk input which is provided directly to a pll. But when i tried my design with Quartus 13.0, it failed. It seems they determined that it was a defect in QII 13.0. Reading again through the KB article in your post it seems like Quartus 13.0 will let you use the i/os as LVDS but it may not function correctly!?
Yes! I am not sure about the DDR core. It'd be interesting to note.