Honored ContributorHello, I have a design that implements an FFT on a Stratix FPGA I'm thinking about a new design using the Arria 10 SoC FPGA. In my new design I was thinking about moving the FFT operations onto the HPS. Can anyone comment on the FFT performance on the HPS versus on the FPGA side?
Thanks, Joe
Honored ContributorI don't have a number off the top of my head but this design might interest you: https://rocketboards.org/foswiki/view/documentation/socswws1introtoalterasocdeviceslab4linuxfftapplication
The size, radix, and input/output buffer, and data resolution of the FFT will play a big role in the performance, if it fits well in the cache and doesn't require floating point then the performance should be fairly good. If you search around for FFT benchmarks for the Cortex-A9 it should give you a ballpark what the performance is like.
