Forum Discussion
Altera_Forum
Honored Contributor
15 years agoALTMEMPHY Debug GUI: Fails Read Resynch Phase Cal Rst
I'm debugging a DDR2 SO-DIMM design that doesn't work (the example top design seemingly doesn't do anything). I enabled the debug interface per the EMI handbook (debug section) and ran the Debug GUI....
Altera_Forum
Honored Contributor
15 years agoI tried to lower the interface speed to 125 MHz but without luck. Are the RUP and the RDN resistors required? Will the interface fail like described if the HPCII calibration block is not used? I designed my SODIMM interface per the Arria II GX devkit but missed the RUP and RDN pins.