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Altera_Forum
Honored Contributor
16 years agoALTGX the cal_blk_clk signal, what is it?
Please help with a simple query. I set up a ALTGX using the wizard tool, the pll_inclk signal is the reference clock that is multiplied by PLL to make tx_clkout[0] and time the serial data righ...
Altera_Forum
Honored Contributor
16 years agoHi,
The cal_blk_clk is the clock for the calibration block of the ALTGX. In the stratix IV it should be between 10 MHz and 125 MHz. (It is described in the Handbook vol 2 of the corresponding device ) "The calibration block internally generates a constant internal reference voltage, independent of process, voltage, or temperature variations. It uses the internal reference voltage and external reference resistor (you must connect the resistor to the RREF pin) to generate constant reference currents. These reference currents are used by the analog block calibration circuit to calibrate the transceiver blocks. " Cheers