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Altera_Forum
Honored Contributor
15 years agoALTGX for A2GX always outputs K28.5- ?!
Hello, I perform an RTL simulation (ModelSim) of an ALTGX transmitter-only for an Arria II GX. The transmitter is set to take a 20-bit input. I use Basic mode, 4 lanes unbonded. After I releas...
Altera_Forum
Honored Contributor
15 years agoThe same problem with simulating altgx 3gb/s 1 lane 16bit+8b/10b basic mode transmitter+receiver cyclone iv gx.
The receiver works fine after correct initialization procedure, transmitter do not. I have added pause, like you, but no success, it is in stuck state. The initializing procedure: (timescale = 1ps)initial begin
gxb_powerdown <= 0;
pll_areset <= 0;
rx_analogreset <= 0;
rx_digitalreset <= 0;
tx_digitalreset <= 0;
# 10000 gxb_powerdown <= 1;
pll_areset <= 1;
rx_analogreset <= 1;
rx_digitalreset <= 1;
tx_digitalreset <= 1;
# 1000000 pll_areset <= 0;
gxb_powerdown <= 0;
wait( pll_locked) repeat( 300) @ (posedge tx_clkout);
tx_digitalreset <= 0;
wait( ~busy) repeat( 3) @ (posedge tx_clkout);
rx_analogreset <= 0;
wait( rx_freqlocked)# 4000000 rx_digitalreset <= 0;
end This - "wait( pll_locked) repeat( 300) @ (posedge tx_clkout)" do not help. There is no required pause in handbook's description.