Altera Stratix4 GX Dev Kit 530 vs Terasic DE4

Good morning all Gurus,

Basically it will be a realtime system running 24/7. I wish to include the following features into stratix 4 V530, wondering whether it has enough LE for that if not all can find in daughter board, such as the RF link.

-------------- main feature --------------

Input 1>> 6 channel of 14bits ADC 400 MSa/s, connected through LVDS-HSMC bridge (Texas daughterboards)

Input 2>> timestamp text string from a timing device (RS232 interface)

I/O 1 >> high speed 2.4GHz RF wireless link communication (can't find any daughterboard yet)

I/O 2 >> read/write SATA 3 mechanical harddisk or SSD (will use Terasic Daughter board)

I/O 3 >> Gigs of DDR3 RAM.

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I don't see any GPIO pin for jumper wires (e.g. interrupt). Is there a fan-out board for customised GPIO logics?

I think Terasic-DE4 DDR2 is fast enough to intake ADC streaming. (Terasic says DE4 DDR2 can reach the max of 102Gbps)

14bits * 400MSample/s = 5.6 Gbps, 6 channels in parallel will reach 33.6 Gbps, theoretically. Please correct me if this is incorrect.

Questions:

I know each kit come with 2 HSMC only. Any suggestion to use a Stratix 4 with 6 units of ADC?

Newbie doubts: Do we need to rely on paid-IPcores for the features aforementioned? or we can take time to design every bits in FPGA...

Thanks