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Altera_Forum
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15 years ago

Altera RAMB4_S4_S4 generic map problem?

hello, I am learning the cpu_lecture from opencores with my cycloneII board, I replace the xilinx RAMB4_S4_S4 IP core into altera one, but the design need 8 rams with different contents, and it is...
Altera_Forum's avatar
Altera_Forum
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15 years ago

Using initialization hex files shouldn't be too hard, but may be unwanted to keep the code compatible.

It should be possible to design a RAMB4_S4_S4 wrapper including the INIT generics, except for the non-existing RST inputs, by using an inferred DP RAM with initialization.