Honored Contributor
Honored Contributoralso, When I compile my test design, I have a warning:
Warning (332056): PLL cross checking found inconsistent PLL clock settings: Warning (332056): Node: inst|testpll_inst|altera_pll_i|general[0].gpll~FRACTIONAL_PLL|vcoph[0] was found missing 1 generated clock that corresponds to a base clock with a period of: 100.000 Warning (332056): Node: inst|testpll_inst|altera_pll_i|general[0].gpll~FRACTIONAL_PLL|vcoph[1] was found missing 1 generated clock that corresponds to a base clock with a period of: 100.000 Warning (332056): Node: inst|testpll_inst|altera_pll_i|general[0].gpll~FRACTIONAL_PLL|vcoph[2] was found missing 1 generated clock that corresponds to a base clock with a period of: 100.000 Warning (332056): Node: inst|testpll_inst|altera_pll_i|general[0].gpll~FRACTIONAL_PLL|vcoph[3] was found missing 1 generated clock that corresponds to a base clock with a period of: 100.000 Warning (332056): Node: inst|testpll_inst|altera_pll_i|general[0].gpll~FRACTIONAL_PLL|vcoph[4] was found missing 1 generated clock that corresponds to a base clock with a period of: 100.000 Warning (332056): Node: inst|testpll_inst|altera_pll_i|general[0].gpll~FRACTIONAL_PLL|vcoph[5] was found missing 1 generated clock that corresponds to a base clock with a period of: 100.000 Warning (332056): Node: inst|testpll_inst|altera_pll_i|general[0].gpll~FRACTIONAL_PLL|vcoph[6] was found missing 1 generated clock that corresponds to a base clock with a period of: 100.000 Warning (332056): Node: inst|testpll_inst|altera_pll_i|general[0].gpll~FRACTIONAL_PLL|vcoph[7] was found missing 1 generated clock that corresponds to a base clock with a period of: 100.000
