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Altera_Forum's avatar
Altera_Forum
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18 years ago

Altera Jtag and Active Serial Programming Protocol

Hi all, i an new to this forum and hope you all can give me a hand on the problem i face.

Currently i m working on a project to implement an independent stand-alone Altera programmer by using Altera FPGA chip to program on the other FPGA chip.

In Quartus II programmer, there are 2 type of programming mode which is ASP mode and Jtag mode. Is there any reference document or firmware source code regarding on how the programmer write to or read from FPGA?

I will appreciate every information provided to me. Thank you.

-LavenderPuppy-

2 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    18 years ago

    Thx for the advice, i will take a look on the handbook. =)

    -LavenderPuppy-
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    18 years ago

    hi lavenderPuppy

    You can begin in looking at the handbook of the device you're using. There is a chapter named "Configuration 'YourDevice' device" ('YourDevice' could be cycloneII, stratixIII, etc...) where all configuration schemes are explained in details.

    Regards,