Altera DDR3 traffic generator behavior question

Thank you for the reply, Ted.

I do hit that timeout, and thats when I reset the IP while its operational, and then remove the reset to make it start again.

I am wondering whether this condition could force a timeout, e.g. if the reset happens WHILE the IP was performing a write burst to the memory controller and the reset caused that burst to be prematurely terminated before its "burst size" got over, could that cause the memory controller to go into a sort of hung state and not respond to subsequent commands from the BIST IP, causing a timeout?