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Altera_Forum
Honored Contributor
14 years agoALT_INBUF_DIFF and Pin Planner
I'm new to the Quatus Env and hitting a snag when implementing the ALT_INBUF_DIFF. Top-level I have a LVDS sync_pulse_p and a sync_pulse_n going to the ALT_INBUF_DIFF primitive. sync_...
Altera_Forum
Honored Contributor
14 years agoOkay, but could you explain how to implement this?
For example: top.vhdl will have th signal: sync_pulse Pin Planner will have I/O Standard LVDS for the sync_pulse & sync_pulse(n). What will the final sync_pulse signal be called in the top vhdl file? sync_pulse??