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Altera_Forum
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17 years ago

All stx 2 running on single clk pin(no ppm offset)

Hi Im new to altera FPGAs. I went throughout Stx II handbook but one thing is still not clear to me whether is possible. Can I run the entire device based on one fast PLL whic...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

Thanks Guys,

I thought so.

I got a 2.5 LVDS fan-out buffer on board I thought is useful to distribute to the top/bottom (Banks 4 and 7) to feed plls 5,6.

Looks like though, I have to AC couple and terminate’em externally for they are referenced to VCCINT ?

bst rgrds

Peter