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Altera_Forum
Honored Contributor
Honored ContributorAbout the Quartus II TimeQuest Timing Analyzer
A device bus output of the data clock of the D flip-flop 80M, B device with the clock of the D flip-flop of the same 80M to receive in my design. The two 80M clocks is from a clock chip fan out.A dev...
Altera_ForumHonored Contributor
Honored ContributorHave a look at this timequest user guide (http://www.alterawiki.com/wiki/timequest_user_guide).
The section "IO timing", pages 14 and up, gives you step by step instructions on how to set the requirements.
