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Honored Contributor
Honored ContributorAbout the FPGA
I need to make my FPGA automatically to read the .hex fire (which is a test program) when I synthesis my CPU core (openMSP430) to the FPGA. Where should I put this hex fire ,in the FLASH or SDRAM, an...
Altera_ForumHonored Contributor
Honored ContributorI have remove the REG5 which is adapt the voltage from 3.3V to 1.2, and insert a resistor between the REG5 1.2V output and the CPU core. err.. what does "put the hex fire on-chip memory" mean? Does it mean generage a sram in FPGA just like pll? Thany you.
