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Altera_Forum
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15 years ago

A problem with DDR2 and PLL core in SOPC

In my SOPC design(Quartus II 10.1), both Avalon_altpll and DDR2 controller are used. And I can generate the nios core successfully. However, when I compile the whole design, the software always warni...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Hi,

I have exactly the same problem! I want to instantiate a pll, but whether it be as a megafunction or within SoPC builder, it gives me that error. Did you find a way around it?

Cheers,

Josef