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Altera_Forum
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14 years ago

1.3V-LVCMOS IO standard

I would like to interface a Cyclone IV FPGA with a component that uses 1.3V-LVCMOS. However, the FPGA IO standards are either 1.2V or 1.5V. Is it possible to connect the Vccio pins to 1.3V? If it's p...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

Thanks a lot for your answer. However, I would like to avoid having 1.2V and 1.3V voltage regulators. The device core runs on 1.0V, so I don't need 1.2V for anything else. Therefore my question is if I can use 1.3V as Vccio for the FPGA.

The datasheet specifies the Vccio recommended operation conditions for the 1.2V standard as 1.14V (min) and 1.26V (max). For the 1.5V standard, it is 1.425 (min) and 1.575 (max).

But I guess these specs are only to guarantee compatibility with the JESD8 1.2V-LVCMOS and 1.5V-LVCMOS standards. I can't imagine a Vccio between 1.26V and 1.425V would reduce the performance or even damage the device. But I can't find any information on this topic.

I hope this makes my question more clear. Thanks in advance for your help.