Altera_Forum
Honored Contributor
15 years ago# - Time Delay
So i understand the# is used as a delay, however -What clock does it use as reference to delay? -Is this only for simulation? Does it have no effect on an actual FPGA?
If you put
`timescale 1 ns / 100 psat the start of your test bench file, the period defined by the# delay is then in nanoseconds. i.e.# 100 is 100ns.