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Altera_Forum
Honored Contributor
9 years agoI am sorry for reading the previous.
I have succeeded to avoid the errors myself. The way to use differential pins is to use ALTIOBUF_XXX Mega-Functions like below;library ieee, altera_mf;
use ieee.std_logic_1164.all;
use altera_mf.altera_mf_components.all;
entity LPDDR2_controller is
port (
-- Command/address inputs
CA: out std_logic_vector(9 downto 0);
-- Clock
CK_p: out std_logic;
CK_n: out std_logic;
-- Clock enable
CKE: out std_logic_vector(1 downto 0);
-- Chip Select
CS_n: out std_logic_vector(1 downto 0);
-- Input data mask
DM: out std_logic_vector(3 downto 0);
-- Data input/output
DQ: inout std_logic_vector(31 downto 0);
-- Data strobe
DQS_p: inout std_logic_vector(3 downto 0);
DQS_n: inout std_logic_vector(3 downto 0);
-- External impedance (240 ohm)
ZQ: in std_logic
);
end;
architecture controller of LPDDR2_controller is
signal dqs_out: std_logic_vector(3 downto 0);
signal ck_out: std_logic_vector(0 to 0);
signal ck_out_b: std_logic_vector(0 to 0);
begin
CA <= "0000000111"; -- NOP
i0: altiobuf_out -- HERE
generic map(
number_of_channels => 1,
use_differential_mode => "TRUE"
)
port map(
datain => "0",
dataout => ck_out,
dataout_b => ck_out_b
);
CK_p <= ck_out(0);
CK_n <= ck_out_b(0);
CKE <= "00";
CS_n <= "00";
DM <= "0000";
DQ <= (others => '0');
i1: altiobuf_bidir -- AND HERE
generic map(
number_of_channels => 4,
use_differential_mode => "TRUE"
)
port map(
datain => (others => '0'),
dataio => DQS_p,
dataio_b => DQS_n,
dataout => dqs_out,
oe => (others => '1')
);
end; I will try to use this MFs. I will have to check that they work correctly... Thank you for reading. Post Script: Because the compiler raises a pretty critical warning to this code in my environment, I am going to search the next problem.