Where Can I find the Timing Diagram of Avalon-MM Interface in Arria10 EMIF IP Core?

Hi,

I'm using EMIF IP Core in my Arria10 SoC, there's an auto-generated Avalon-MM interface to communicate with user logic, but I haven't found the timing diagram of Avalon-MM in the EMIF user guide so far, where can I find the the correct timing diagram?

Besides, how can I confirm the relationship between the Avalon-MM's address and external-memory's address?

Thanks, regards.