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BMart12's avatar
BMart12
Icon for Occasional Contributor rankOccasional Contributor
6 years ago

What frame buffer address should I use for the vip framebuffer II parameter?

I instantiated the vip framebuffer II with the default address of 0x00000000. I am using the Tearsic DE10-Standard development board and Quartus 18.1 standard. I wrote a test program for Linux to e...
CheepinC_altera's avatar
CheepinC_altera
Icon for Regular Contributor rankRegular Contributor
6 years ago

Hi Ben,

Thanks for your update. As I understand it, when you use the example design from Terasic, there is no issue with the LCD display. Sorry as I am not really familiar with embedded area and also I am unable to comment on design implementation. However I will try my best to assist from the VIP perspective. Hope you could understand it.

Just would like to check with you on the following:

1. Just wonder if you if you have had a chance to try with a simple test design with Test Pattern Gen II -> Frame Buffer II -> CVO II -> LCD to see if there is any valid display on LCD? This would be helpful to ensure the FB II and CVO II IPs are working correctly prior to replacing the video source.

2. If #1 is working, you may start to replace the test pattern generator with your video source. This would help to narrow down the issue to video source if there is any issue observed.

3. You may also cross check your video data with the one from the Test Pattern Generator if #2 is not working. You may use signaltap to monitor the video data for cross checking.

Please let me know if there is any concern. Thank you.

Best regards,

Chee Pin

  • BMart12's avatar
    BMart12
    Icon for Occasional Contributor rankOccasional Contributor
    6 years ago
    Hi Chee, The good news is that I finally got my test program to work. I determined that the framebuffer address parameter in the VFB II block is apparently ignored. I used an arbitrary address of 0x20000000 as the framebuffer. I mapped this physical address to my program’s virtual space. I then set the frame start address with this address. I infer that the VFB II uses the address presented in this register and the base address defined in the component editor is ignored. As I wrote you yesterday, I had already instantiated Test Pattern Gen II -> CVO II -> LCD and verified that hardware connection to the LCD worked. After I replaced TPG II with VFB II, I figured the only issue was how to make the VFB II logic work. My test program showed the control port was as expected from the documentation. I am wondering, based on your comments today; it seems you did not receive the email I sent you yesterday. Did you get it? Ben