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Altera_Forum
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14 years ago

Using SSRAM on cycolne III board

Hi, I am fresher & new to this FPGA platform. Flash & SSRAM share data & address lines. For SSRAM the address range used is 19 downto 2. The SSRAM mounted in board is IS61LP25636A-2...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

No,it is as good as replacing sram_data wtih 0x00, in the above IOWR or IORD functions,right.

i tried it,still it is giving out 0x00001080 in all locations.

Moreover,I used the memtest.c template given in the examples folder in the installation directory.

ddr sdram memory test is passed,but test is not passed for ssram.

There is something wrong.Here,since the address,data lines are shared, & i have given reset memory vector as flash.will it cause any problem?

I will try giving both reset & exception vectors of nios cpu as onchip memory.Let us see.