Forum Discussion
DP7
New Contributor
New ContributorUsing DDR3 memory without hard processor
Hi, I have Cyclone V E 5CEFA9F23C7. I need to sample ADC at very high speed (500MHZ) and stream it into an external DDR3 memory. I connected a clock and memory controller in the qsys. exported th...
NurAida_A_Intel
Frequent Contributor
Frequent Contributor Hi DP7,
It is not necessarily to use the nios as the memory controller access using the AVMM interface. To generate the example design and run simulation, refer to this chapter 13.3 (Uni-PHY Based Example Design) of the external memory hadbook:
On the simulation, you can check the traffic pattern of the avalon mm interface.
Hope this helps.
