Forum Discussion
Suhas_1994
New Contributor
New ContributorTransceiver Native PHY Intel Cyclone 10 FPGA IP
Hello,
I am trying to generate the Transceiver Native PHY using Quartus. The design gets generated successfully. When I try to compile the design, I'm getting the error which is attached below.
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CheepinC_altera
Regular Contributor
Regular ContributorHi,
Just to follow with you on the simple test design for replication. Thank you.
