Forum Discussion

Suhas_1994's avatar
Suhas_1994
Icon for New Contributor rankNew Contributor
4 years ago

Transceiver Native PHY Intel Cyclone 10 FPGA IP

Hello, I am trying to generate the Transceiver Native PHY using Quartus. The design gets generated successfully. When I try to compile the design, I'm getting the error which is attached below. ...
CheepinC_altera's avatar
CheepinC_altera
Icon for Regular Contributor rankRegular Contributor
4 years ago

Hi,


As I understand it, you have some inquiries related to the Fitter error. As I look at your screenshot, it seems like you are trying to connect the transceiver pins to general purpose IO. For your information, the transceiver pins have dedicated location in a device. I would recommend you to remove all the pin assignment and allow the Fitter to perform autofit. You then refer to the optimal location assigned by Fitter.


Please let me know if there is any concern. Thank you.


Suhas_1994's avatar
Suhas_1994
Icon for New Contributor rankNew Contributor
4 years ago

Hello,

After generating the design, there are no pin assignments done. When compiled, it still shows the same error as before.

Can you please help me with this??

Thanks in advance.