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BMart12's avatar
BMart12
Icon for Occasional Contributor rankOccasional Contributor
4 years ago
Solved

Technology Map Viewer Post-Fitting signal names

Hello, I am using the SignalTap II logic analyzer on Quartus Prime Version : 18.1.1 Build 646 04/11/2019 SJ Standard Edition. I am tracing logic in the Cyclone V SOC to debug a memory-mapped slave...
  • sstrell's avatar
    sstrell
    4 years ago

    Names can get distorted through the place and route process. The ~ does not necessarily mean anything other than the name of a signal changed or a new internal signal was created through this process. If you know the signals you want to tap from your design itself, use the Signal Tap pre-synthesis Node Finder filter instead of post-fit nodes you find in the Tech Map Viewer.

YEan's avatar
YEan
Icon for Contributor rankContributor
4 years ago

Hi,

I’m think that your issue has been resolved by sstrell.
I'll now transition this thread to community support.
If you have a new question, feel free to open a new thread to get the support from Intel experts.

Thank you.

Best regards,

Ean

BMart12's avatar
BMart12
Icon for Occasional Contributor rankOccasional Contributor
4 years ago

I apologize for the delay in my response. I missed sstrell's response. I accepted his suggestion.