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Contributor

5 years ago

Stratix 10 SoC Dev Kit - L-tile - FPGA-DDR4 (SODIMM ) Example design

Hi, I am using stratix 10 SoC dev kit https://www.intel.com/content/www/us/en/programmable/products/boards_and_kits/dev-kits/altera/stratix-10-soc-development-kit.html I have downloaded the BTS...

ybin

Occasional Contributor

5 years ago

Hello,

Normally, there is one UDIMM memory in Stratix10 Devkit, not SODIMM. You mean that you just got SODIMM, not UDIMM, is that right? BTW, where do got the Devkit, from Intel side or agent?

HBhat2
Contributor
5 years ago
Hi,

As per stratix 10 SoC product page (below link) & user guide, it is mentioned as SODIMM (attached the snapsot)

https://www.intel.com/content/www/us/en/programmable/products/boards_and_kits/dev-kits/altera/stratix-10-soc-development-kit.html

We got it from Intel's authorized distribution channel here in India (Cytech).

With Regards,

HPB
- HBhat2
  Contributor
  5 years ago
  Hi,
  
  Anybody has the FPGA-DDR4 (16GB) design for Stratix 10 SoC dev kit?
  
  With regards,
  
  HPB
  - ybin
    Occasional Contributor
    5 years ago
    Hi,
    
    You need to download package installer from below page, and then you can find the design locates in download zip file. It locates in examples/sodimm_ddr4 folder.
    
    https://www.intel.com/content/www/us/en/programmable/products/boards_and_kits/dev-kits/altera/stratix-10-soc-development-kit.html

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Stratix 10 SoC Dev Kit - L-tile - FPGA-DDR4 (SODIMM ) Example design

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