SDRAM Usage for the DE1-Soc Board

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Hello Christoph,

SDRAM is a complex chip that requires special logic to operate.

It needs an external refresh mechanism to keep it going, I think this aspect is not in your code.

Best Regards,

Johi.

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Hi John,

thank you for your information. I added you the latest code below.

process(CLK143)

begin

if rising_edge(CLK143) then --write process

--case BUFF_CTRL is

--when st0=>------------write image to SDRAM

--if (SDRAM_WAIT='0')then

SDRAM_WE_N<='0';

SDRAM_RE_N<='1';

--SDRAM_WRITEDATA<="1010101010101010";

DRAM_DQ(15) <= '0';

DRAM_DQ(14) <= '0';

DRAM_DQ(13 downto 0) <= ADC_DB(13 downto 0);

SDRAM_WRITEDATA<=DRAM_DQ;

SDRAM_ADDR<=std_logic_vector(unsigned(SDRAM_ADDR)+1);

--end if;

--when st1=>-----------write from SDRAM to BUFFER

SDRAM_WE_N<='1';

--RAMWE1<=SDRAM_RDVAL;

--SDRAM_RDVAL<='1';

RAMWE1<='1';

SDRAM_RE_N<='0';

SDRAM_WAIT<='0';

SDRAM_ADDR<=std_logic_vector(unsigned(SDRAM_ADDR)+1);

RAMIN1<=SDRAM_READDATA(15 downto 0);

--end case;

end if;

end process;

I am able to write the data but when I read it, I got the wrong value.

Do I have to implement the whole FSM to use the SDRAM properly?

Thanks,

Chris