New Contributor
New ContributorIn AN741:
Which complies with the UG-MAX10-Configuration
In your code :
The signal boot_cfm_sel should be assigned to writdata(1) and writdata(0) should be set to '1' in order to ignore the physical
config_sel pin and setting the loading image according to boot_cfm_sel.
ContributorLast counter value is not important. It is just waiting for restarting the device. You can change it. And AN741 is not complies with UG-MAX10-Configuration. In AN741 they assign reg 1 to 0x3 that means overwrite selected and Image 1 will be used.
Also sorry, I made a mistake on that code. Here is the revised rsu_reconfig function:
when rsu_reconfig => u_valid_in <= '0'; onchip_flash_csr_write <= '0'; if(cnt = 0) then db_avalon_address <= "001"; db_avalon_writedata(0) <= '1'; -- set config_sel_overwrite db_avalon_writedata(1) <= boot_cfm_sel; -- set config_sel db_avalon_writedata(31 downto 2) <= (others => '0'); -- reserved db_avalon_write <= '1'; db_avalon_read <= '0'; cnt <= cnt + 1; elsif(cnt = 3) then -- write operation needs 3 cycle db_avalon_write <= '0'; db_avalon_read <= '0'; cnt <= cnt + 1; elsif(cnt = 4) then db_avalon_address <= "011"; -- busy reg db_avalon_read <= '1'; db_avalon_write <= '0'; cnt <= cnt + 1; elsif(cnt = 5) then -- read operation needs 1 cycle db_avalon_read <= '0'; db_avalon_write <= '0'; cnt <= cnt + 1; elsif(cnt = 6) then -- read data came in 2th cycle if(db_avalon_readdata /= x"00000000") then -- if ufm/cfm busy cnt <= 4; -- go back until busy flag is over else cnt <= cnt + 1; end if; elsif(cnt = 250000000) then -- high cnt value because of CPU should read the RSU checksum acknowledge db_avalon_address <= "000"; -- trigger reconfig db_avalon_writedata <= x"00000001"; -- hold nconfig min 250ns, 4 cycle at 12 MHz db_avalon_write <= '1'; db_avalon_read <= '0'; cnt <= cnt + 1; else -- wait for FPGA trig reconfig cnt <= cnt + 1; end if;
