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Altera_Forum
Honored Contributor
16 years agoI must make a correction. It appears that on your board, the pins are connected to the RGMII interface of the PHY. The difference being that the interface runs at double-data rate. So while the data bus in either direction is 4 bits, data is transferred on both edges of the clock producing 8 bits per clock.
If you intend to interface with the ethernet PHY, you really ought to consider using an ethernet MAC like the Altera Triple-Speed Ethernet MAC. If nothing else, you ought to read over it's documentation so as to understand the interface. http://www.altera.com/literature/ug/ug_ethernet.pdf Jake