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Altera_Forum
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9 years ago

PLL on Altera DE3 Development Board doenst work

Hello everyone, im using the developement board altera DE3 (Stratix III , EP3SL150f1152C2N) for my master thesis. Im trying to use a PLL to get a higher clock. Therefor im using the internal 50...
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Altera_Forum
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9 years ago

When you instantiate the PLL don't use:

PLL_inst : PLL PORT MAP(CLK, OPEN, CLK_100 );

but rather use the explicit port assignments:

PLL_inst : PLL PORT MAP(inclk0>=CLK, c0>=CLK_100 );