Hello, I am an altera newbie and am currently working on getting the PCIe system running on DE4.The version of quartus I am using is 10.0 and the SOPC builder fails every time I try to build the PCIe system showing a Java null pointer exception without giving any reason.I am following the directions given by the IP Compiler for PCI Express User Guide. Any help in this matter would be very much appreciated.

10.0 is quite old, and SOPC builder has been superseded by QSYS. Can you try a more recent version of Quartus and use Qsys? Nial.

Hey, I would prefer to work with the latest version, but unfortunately till that is available i want to find if theres some way to work with the available tools.

--- Quote Start --- I would prefer to work with the latest version, but unfortunately till that is available i want to find if theres some way to work with the available tools. --- Quote End --- If you are running Quartus 10.0, and compiling for the DE4, then you must already have a subscription license. In that case, just install the newer version of Quartus. I did some tests on the Qsys stuff in this thread: http://www.alteraforum.com/forum/showthread.php?t=35678 Using the 11-series of tools. I haven't tried using PCIe with 12.x or 13.x, but the PDF describes the sequence used to create the IP cores, so it should be sufficient for you to create an example for the DE4. Cheers, Dave

Thanks Dave for the reply. Newer version of the Quartus(12.0) is installed now and I am able to build the PCIe system. But I am not able to communicate with the board. I am working on a linux machine, and lspci command shows no track of the altera board being connected. I noticed in your pdf that sometimes wthout the reconfiguration reset logic, the device would never negotiate with a X4 width. The design currently under test is without reconfiguration reset logic and withX4 width. Would this be a problem?

--- Quote Start --- Newer version of the Quartus(12.0) is installed now and I am able to build the PCIe system. --- Quote End --- OK. I think that 13.x has better support for PCIe now ... but I have not looked at that version yet. --- Quote Start --- But I am not able to communicate with the board. I am working on a linux machine, and lspci command shows no track of the altera board being connected. I noticed in your pdf that sometimes wthout the reconfiguration reset logic, the device would never negotiate with a X4 width. The design currently under test is without reconfiguration reset logic and withX4 width. Would this be a problem? --- Quote End --- Download one of the original example designs that comes with the kit. If that design shows up ok, then you know that your problem is related to your current design. Cheers, Dave

PCIe on Stratix IV | Altera Community

13 Replies

Altera_Forum
Honored Contributor
12 years ago
Weirdest thing with method A is, that soft reset for the fpga is not working. Whenever the system is rebooted, the fpga also is restarted and hence loses its configuration. This does not happen when fpga is configured with a non PCIe system and system is restarted.
Altera_Forum
Honored Contributor
12 years ago
--- Quote Start ---
I keep trying with the method A but to no success. I followed the DE4 Getting started manual, but the tools are giving a problem. Could you please look into it if you have the time and suggest a possible direction. I understand the catch of configuration time vs the BIOS start time, but am willing to try it.

--- Quote End ---

I cannot look at it this week. Can you ping me on Monday and I'll check on the DE4-530K that I have. Which board do you have?

--- Quote Start ---

The weirdest thing with method A is the fpga undergoes a hard reset when , it is programmed with a PCIe system and PC is rebooted, thus losing its configuration. This does not happen when a non PCIe system is programmed on the fpga.
--- Quote End ---

What do you mean by "hard reset"? The board should see PCIe reset asserted, but that should not cause the configuration to clear.

Have you probed the hardware to check that all the voltages are present through power-on? How about checking whether the configuration source is correct? (I forget how many options this board has, others have the option for MAX II PFL/FPP configuration or AS configuration, depending on jumper or dial settings).

Cheers,
Dave
Altera_Forum
Honored Contributor
12 years ago
Thanks for the reply Dave. Your help is greatly appreciated.

I am using Terasic Altera DE4 Development and education board - the 230K version.The voltages are present through power on.

By hard reset i mean, the board itself is restarted not just the PCIe system.I have still not been able to figure that out.

Meanwhile,I was able to generate a flash file from the sof.( Although at the end it gives a memory malformed error, I wanted to test with the flash file it produced)I was also able to successfully flash the CFI Flash following the procedures of the manual. But upon reset, the board is not being configured from the flash or atleast with the desired flash. I have been looking all over the internet to find some configuration settings for the board(some jumper or dial settings) but could not find them. They are not given in the user manual or the kit. I however found similar info for DE4 development board (530K), which has a rotary switch to select between the factory flash pages and user flash pages.Maybe something similar is preset for this board too, still in the pursuit of that.

The flash procedure is still not without errors and configuration settings are still amiss.Would you have any info in this direction.

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PCIe on Stratix IV

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