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I don't quite understand the path from the JTAG Master IP on the FPGA to the PC - will it "bind" to the JTAG port automatically? What SW App do I run on the PC to get a command-line interface to it?
If there's like, a good tutorial on this (or a few manual section), I'm game to
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Its all about knowing the right terminology, eh. Look in the Quartus Handbook at System Console. This tool is a Tcl console with Tcl procedures that can be used to find your device on the JTAG chain, and then send read/write commands. The Virtual JTAG interface is accessed from a different tool, quartus_stp, with different Tcl procedures. Start with System Console, as this seems like the tool Altera wants you to use.
Cheers,
Dave
Honored Contributor
