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I'm guessing/hoping that the building blocks for this structure exist and I just have to paste them together. (PC-based USB driver -> USB interface on FPGA, or maybe Rj45 Ethernet?)
Can anyone point me in the right direction?
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The JTAG interface can be used to implement communications. However, you are then limited to using Altera applications on the host. This is not too much of a pain for simple tests, but it does get annoying. I'm looking into a better solution and will post my results. Start by using an Avalon-MM JTAG master along with the SystemConsole Tcl functions to access the device. Design your custom logic as an Avalon-MM slave device.
If you use the RJ45 interface, then you'll need a network interface controller. There is an Altera TSE IP core, but I have yet to test it. I'm not sure how much work it would be to code your own. Once you have the ethernet connected as an Avalon-MM/ST device, then you can code up a server on a NIOS II processor. This would provide a higher-bandwidth interface.
If you have the board plugged into a PCIe motherboard, then you can use a PCIe-to-Avalon-MM bridge IP core, and then communicate from the host as if the board is a PCI device. This is simple under Linux, and you can probably use the Jungo driver under Windows.
I have the same kit as you, but with the 230 devices. I've been using JTAG for testing up until now, but the ethernet and PCIe tests are on my TODO list. If you get stuck, ask, and I'll help if I can.
Cheers,
Dave
Honored Contributor
